In the semiconductor industry, the minimum feature sizes of microelectronic devices are approaching the deep sub-micron regime to meet the demand for faster, lower power microprocessors and digital circuits. The downscaling of complimentary metal-oxide semiconductor (CMOS) devices imposes scaling constraints on the gate dielectric material. The thickness of the standard SiO2 gate dielectric oxide is approaching a level (˜10 Angstrom (A)) at which tunneling currents may significantly impact transistor performance. Silicon oxynitride, SiOxNy, has been used to extend the use of silicon oxide-based gate dielectrics but a long term alternative solution is required. To increase device reliability and reduce electron leakage from the gate electrode to the transistor channel, semiconductor transistor technology is introducing high dielectric constant (high-k) materials that allow increased physical thickness of the gate dielectric layer. Dielectric materials featuring a dielectric constant greater than that of SiO2 (k˜3.9) are commonly referred to as high-k materials. In addition, high-k materials may refer to dielectric materials that are deposited onto substrates (e.g., HfO2, ZrO2) rather than grown on the surface of the substrate (e.g., silicon oxide or silicon oxynitride).
Integration of high-k films as gate dielectrics into semiconductor applications requires addressing various problems, including film crystallization during anneals, growth of interface layers, large densities of interface traps, reduced channel mobility, reaction with poly-silicon or metal-containing gate electrodes, and Fermi level pinning with metal-containing gate electrodes. Furthermore, many thin high-k films have dielectric constants that are lower than that of the corresponding thick (bulk) high-k materials.
The formation of a thin dielectric interface layer between a high-k film and an underlying substrate (e.g., a silicon substrate) during deposition of the high-k and/or during post-deposition annealing may be highly beneficial to preserve interface state characteristics and form an interface with good electrical properties. The quality of the interface layer can affect device performance, as the interface layer is intimately connected to the channel of the transistor. However, the presence of an oxide or oxynitride interface layer lowers the overall dielectric constant of the film structure and, therefore, the interface layer may need to be thin. Accordingly, further developments are required to solve these and other problems associated with integration of high-k films into semiconductor devices.